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Computer organization & design: the hardware/software interface

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Contents

5.4 A Multicycle Implementation
5.5 Microprogramming : Simplifying Control Design
5.6 Exceptions
5.7 Real Stuff : The Pentium Pro Implementation
5.8 Fallacies and pitfalls
5.9 Concluding Remarks
5.10 Historical Perspective and Futher Reading
5.11 Key Terms
5.12 Exercises

6 Enchacing Performance with Pipelining
6.1 An Overview of Pipelinig
6.2 A Pipelined Datapath
6.3 Pipelined Control
6.4 Data Hazards and Forwading
6.5 Data Hazards and Stalls
6.6 Branch Hazards
6.7 Exceptions
6.8 Superscalar and Dynamic Pipelining
6.9 Real stuff: PowerPC 604 and Pentium Pro Pipelines
6.10 Fallacies and Pitfalls
6.11 Concluding Remarks
6.12 Historical Perspective and further Reading
6.13 Key Terms
6.14 Exercises

7 Large and Fast : Exploiting Memory Hierarchy
7.1 Introduction
7.2 The Basics of Caches
7.3 Measuring and Improving Cache Performance
7.4 Virtual Memory
7.5 A Common Framework for Memory Hierarchies
7.6 Real Stuff : The pentium Pro and PowerPC 604 Memory Hierarchies
7.7 Fallacies and Pitfalls
7.8 Concluding Remarks
7.9 Historical Perspective and Further Reading
7.10 Key Terms
7.11 Exercises

8 Interfacing Processors and Peripherals
8.1 Introduction
8.2 I/O Performance Measures: Some Example from Disk and File System
8.3 Types and Characteristic of I/O Devices
8.4 Buses: Connecting I/O Devices to Processor and Memory
8.5 Interfacing I/O Devices to the Memory , Processor, and Operating System
8.6 Designing an I/O System
8.7 Real stuff: a Typical Desktop I/O System
8.8 Fallacies and Pitfalls
8.9 Concluding Remarks
8.10 Historical Perspective and Further Reading
8.11 Key Terms
8.12 Exercises

9 Multiprocessors
9.1 Introduction
9.2 Programming Multiprocrssors
9.3 Multiprocessors Connected by a Single Bus
9.4 Multiprocessors Connected by a Network
9.5 Clusters
9.6 Network Topologies
9.7 Real Stuff: Future Directions for Mutiprocessors
9.8 Fallacies and Pitfalls
9.9 Concluding Remarks-Evolutoin versus Revolution in Computer Architecture
9.10 Historical Perspective and Further Reading
9.11 Key Terms
9.12 Exercises

A P P E N D I C E S
A Assemblers, Linkers, and The SPIM Simulator
A.1 Introduction
A.2 Assemblers
A.3 Linkers
A.4 Loading
A.5 Memory Usage
A.6 Procedure Call Convention
A.7 Exceptions and Interrupts
A.8 Input and Output
A.9 SPIM
A.10 MIPS R2000 Assembler Language
A.11 Concluding Remarks
A.12 Key Terms
A.13 Exercises

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Availability

Detail Information

Series Title

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Call Number

004.2 PAT C

Publisher

New York : Morgan Kaufmann Publisher., 1946

Collation

xi, 756 hlm.; ilus.; 24 cm

Language

English

ISBN/ISSN

9781558604919

Classification

004.2

Content Type

-

Media Type

-

Carrier Type

-

Edition

Second Edition

Subject(s)

-

Specific Detail Info

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Statement of Responsibility

David A. Petterson and John L. Hannessy

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