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Digital signal processing with field programmable gate arrays

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Terdapat bibliografi dan indeks.

1. Introduction
1.1 Overview of Digital Signal Processing (DSP)
1.2 FPGA Technology
1.3 DSP Technology Requirements
1.4 Design Implementation

2. Computer Arithmetic
2.1 Introduction
2.2 Number Representation
2.3 Binary Adders
2.4 Binary Multipliers
2.5 Binary Dividers
2.6 Fixed-Point Arithmetic Implementation
2.7 Floating-Point Arithmetic Implementation
2.8 Multiply-Accumulator (MAC) and Sum of Product (SOP
2.9 Computation of Special Functions Using CORDIC
2.10 Computation of Special Functions using MAC Calls

3. Finite Impulse Response (FIR) Digital Filters
3.1 Digital Filters
3.2 FIR Theory
3.3 Designing FIR Filters
3.4 Constant Coe?cient FIR Design

4. In?nite Impulse Response (IIR) Digital Filters
4.1 IIR Theory
4.2 IIR Coe?cient Computation
4.3 IIR Filter Implementation
4.4 Fast IIR Filter
4.5 Narrow Band IIR Filter
4.6 All-Pass Filter Design of Narrow Band IIR Filter

5. Multirate Signal Processing
5.1 Decimation and Interpolation
5.2 Polyphase Decomposition
5.3 Hogenauer CIC Filters
5.4 Multistage Decimator
5.5 Frequency-Sampling Filters as Bandpass Decimators
5.6 Design of Arbitrary Sampling Rate Converters
5.7 Filter Banks
5.8 Wavelets

6. Fourier Transforms
6.1 The Discrete Fourier Transform Algorithms
6.2 The Fast Fourier Transform (FFT) Algorithms
6.3 Fourier-Related Transforms

7. Communication Systems
7.1 Rectanguler and number theoretic transform (NTTs)
7.2 Error Control and Cryptography
7.3 Modulation and Demodulation

8. Adaptive Systems
8.1 Application of Adaptive Systems
8.2 Optimum Estimation Techniques
8.3 The Widrow

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Availability

Detail Information

Series Title

null

Call Number

621.382 MEY d

Publisher

Florida : Springer., 2007

Collation

x, 774 hlm.; ilus.; 24cm.

Language

English

ISBN/ISSN

9783540726128

Classification

621.382

Content Type

-

Media Type

-

Carrier Type

-

Edition

Third Edition

Subject(s)

Signal processing systems
Digital signal processing
Communication hardware, interfaces and storage

Specific Detail Info

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Statement of Responsibility

Uwe Meyer-Baese

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