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Digital system designs and practices

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Anak judul using verilog HDL and FPGAs.
Terdapat bibliografi dan indeks.

Preface.
Chapter 1 Introduction.
Chapter 2 Structural Modeling.
Chapter 3 Dataflow Modeling.
Chapter 4 Behavioral Modeling.
Chapter 5 Tasks, Functions And Udps.
Chapter 6 Hierarchical Structural Modeling.
Chapter 7 Advanced Modeling Techniques.
Chapter 8 Combinational Logic Modules.
Chapter 9 Sequential Logic Modules.
Chapter 10 Design Options Of Digital Systems.
Chapter 11 System Design Methodology.
Chapter 12 Synthesis.
Chapter 13 Verification.
Chapter 14 Arithmetic Modules.
Chapter 15 Design Examples.
Chapter 16 Design For Testability.
Appendix A Verilog Hdl Syntax.
Index.

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Availability

Detail Information

Series Title

null

Call Number

621.381 LIN D

Publisher

Singapore : John Wiley & Sons., 2008

Collation

xxiv.; 809 hlm.; 25 cm

Language

English

ISBN/ISSN

9780470823231

Classification

621.381

Content Type

-

Media Type

-

Carrier Type

-

Edition

null

Subject(s)

Digital Electronics
Field Prgrammable Gate Arrays
FPGA
Verilog (Computer Hardware Description Language

Specific Detail Info

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Statement of Responsibility

Ming-Bo Lin

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